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5.47.3 ARM NEON Intrinsics

These built-in intrinsics for the ARM Advanced SIMD extension are available when the -mfpu=neon switch is used. These intrinsics are defined in <arm_neon.h>.

Note: Only the <arm_neon.h> interface is supported. Internally, GCC uses built-in functions to achieve the functionality in the aforementioned header file, but they are not supported and are subject to change without notice.

For scalars, these intrinsics use the standard types int8_t, int16_t, int32_t, int64_t, uint8_t, uint16_t, uint32_t and uint64_t from <stdint.h>, as well as float32_t for single-precision floating-point values and poly8_t and poly16_t for polynomials.

For vectors, the intrinsics support 64-bit and 128-bit vectors whose elements are one of the above types. The type TxN_t is a vector of N elements of type T_t (for example, int16x8_t). These types should be considered as opaque types that can only be used via these intrinsics.

Some intrinsics use structures containing two, three or four vectors. Such structures are named VxM_t for a vector type V, and contain a single element, an array called val whose elements are of the vector type. For example:

     typedef struct int16x8x3_t
     {
       int16x8_t val[3];
     } int16x8x3_t;
5.47.3.1 Addition
5.47.3.2 Multiplication
5.47.3.3 Multiply-accumulate
5.47.3.4 Multiply-subtract
5.47.3.5 Subtraction
5.47.3.6 Comparison (equal-to)
5.47.3.7 Comparison (greater-than-or-equal-to)
5.47.3.8 Comparison (less-than-or-equal-to)
5.47.3.9 Comparison (greater-than)
5.47.3.10 Comparison (less-than)
5.47.3.11 Comparison (absolute greater-than-or-equal-to)
5.47.3.12 Comparison (absolute less-than-or-equal-to)
5.47.3.13 Comparison (absolute greater-than)
5.47.3.14 Comparison (absolute less-than)
5.47.3.15 Test bits
5.47.3.16 Absolute difference
5.47.3.17 Absolute difference and accumulate
5.47.3.18 Maximum
5.47.3.19 Minimum
5.47.3.20 Pairwise add
5.47.3.21 Pairwise add, single_opcode widen and accumulate
5.47.3.22 Folding maximum
5.47.3.23 Folding minimum
5.47.3.24 Reciprocal step
5.47.3.25 Vector shift left
5.47.3.26 Vector shift left by constant
5.47.3.27 Vector shift right by constant
5.47.3.28 Vector shift right by constant and accumulate
5.47.3.29 Vector shift right and insert
5.47.3.30 Vector shift left and insert
5.47.3.31 Absolute value
5.47.3.32 Negation
5.47.3.33 Bitwise not
5.47.3.34 Count leading sign bits
5.47.3.35 Count leading zeros
5.47.3.36 Count number of set bits
5.47.3.37 Reciprocal estimate
5.47.3.38 Reciprocal square-root estimate
5.47.3.39 Get lanes from a vector
5.47.3.40 Set lanes in a vector
5.47.3.41 Create vector from literal bit pattern
5.47.3.42 Set all lanes to the same value
5.47.3.43 Combining vectors
5.47.3.44 Splitting vectors
5.47.3.45 Conversions
5.47.3.46 Move, single_opcode narrowing
5.47.3.47 Move, single_opcode long
5.47.3.48 Table lookup
5.47.3.49 Extended table lookup
5.47.3.50 Multiply, lane
5.47.3.51 Long multiply, lane
5.47.3.52 Saturating doubling long multiply, lane
5.47.3.53 Saturating doubling multiply high, lane
5.47.3.54 Multiply-accumulate, lane
5.47.3.55 Multiply-subtract, lane
5.47.3.56 Vector multiply by scalar
5.47.3.57 Vector long multiply by scalar
5.47.3.58 Vector saturating doubling long multiply by scalar
5.47.3.59 Vector saturating doubling multiply high by scalar
5.47.3.60 Vector multiply-accumulate by scalar
5.47.3.61 Vector multiply-subtract by scalar
5.47.3.62 Vector extract
5.47.3.63 Reverse elements
5.47.3.64 Bit selection
5.47.3.65 Transpose elements
5.47.3.66 Zip elements
5.47.3.67 Unzip elements
5.47.3.68 Element/structure loads, VLD1 variants
5.47.3.69 Element/structure stores, VST1 variants
5.47.3.70 Element/structure loads, VLD2 variants
5.47.3.71 Element/structure stores, VST2 variants
5.47.3.72 Element/structure loads, VLD3 variants
5.47.3.73 Element/structure stores, VST3 variants
5.47.3.74 Element/structure loads, VLD4 variants
5.47.3.75 Element/structure stores, VST4 variants
5.47.3.76 Logical operations (AND)
5.47.3.77 Logical operations (OR)
5.47.3.78 Logical operations (exclusive OR)
5.47.3.79 Logical operations (AND-NOT)
5.47.3.80 Logical operations (OR-NOT)
5.47.3.81 Reinterpret casts