[rescue] Re: [geeks] THIS. MAKES. ME. SICK.

[Björn Ramqvist]

dave at cca.org wrote:
> 
> >  ...and, well, vector execution units.  And multiple processors.  And a
> >crossbar switch for memory access.  And multiple I/O processors.  And
> >the fact that the Cray PVP architecture isn't very RISC-like.
> 
> Woo - memory and IO. I said that, didn't I? Take a Cray, and replace the
> CPUs with standard RISC chips. I don't think there would be much difference.

Wouldn't that make a... Cray T3E?
Although an MPP-machine with Alpha (RISC) processors and massive
interconnect...

Even todays machines are rather hefty with crossbar-switch memory, CPUs
and I/O. (SGI Octane/Origin, Alpha ES/GS-series)
Basicly RISC-machines but with improved memory interconnect.

/Bjorn